1. Field of the Invention
The present invention relates to a sealing material that enables collective sealing on a wafer level, and more particularly to a sealing material having a substrate-like shape, and also relates to a substrate having the semiconductor devices mounted thereon and a wafer having semiconductor devices formed thereon which are sealed with the substrate-like sealing material, a semiconductor apparatus obtained by forming the substrate having the semiconductor devices mounted thereon and the wafer having the semiconductor devices formed thereon into pieces, and a method for manufacturing a semiconductor apparatus using the substrate-like sealing material.
2. Description of the Related Art
In regard to wafer-level sealing for a semiconductor devices mounting surface of a substrate having the semiconductor devices mounted thereon or a semiconductor devices forming surface of a wafer having semiconductor devices formed thereon, various kinds of methods have been conventionally suggested and examined, and there are sealing based on spin coating, sealing based on screen printing (Japanese Unexamined Patent Application Publication No. 2002-179885), and a method using a composite sheet obtained by coating a film support with a hot-melt epoxy resin (Japanese Unexamined Patent Application Publication No. 2009-60146 and Japanese Unexamined Patent Application Publication No. 2007-001266) as examples of such methods.
Among others, as a wafer-level sealing method for a semiconductor devices mounting surface of a substrate having semiconductor devices mounted thereon, a method that has been recently put into commercial production comprises attaching a film having a double-side adhesive layer to an upper portion of a metal, a silicon wafer, or a glass substrate and the like, or applying an adhesive to an upper portion of the substrate by spin coating and the like, then arranging, bonding, and mounting semiconductor devices on the substrate to provide the semiconductor devices mounting surface, and thereafter performing pressure forming and sealing while heating using, e.g., a liquid epoxy resin or an epoxy molding compound, thereby sealing the semiconductor devices mounting surface (Japanese Unexamined Patent Application Publication (Translation of PCT Application) No. 2004-504723). Further, likewise, as a wafer-level sealing method for a semiconductor devices forming surface of a wafer having semiconductor devices formed thereon, a method that has been recently put into commercial production comprises performing pressure forming and sealing while heating using, e.g., the liquid epoxy resin or the epoxy molding compound, thereby sealing the semiconductor devices mounting surface.
However, according to the above-described methods, the sealing can be performed without serious problems when a small-diameter wafer or a small-diameter substrate made of, e.g., a metal of approximately 200 mm (8 inches) is used, but a serious problem is that the substrate or the wafer warps due to contraction stress of an epoxy resin and the like at the time of the sealing and curing when a large-diameter substrate having semiconductor devices mounted thereon or a large-diameter wafer having semiconductor devices formed thereon of 300 mm (12 inches) or above is sealed. Furthermore, when sealing a semiconductor devices mounting surface of the large-diameter substrate having the semiconductor devices mounted thereon on the wafer level, there arises a problem that the semiconductor devices is delaminated from the substrate of a metal and the like due to the contraction stress of, e.g., the epoxy resin at the time of the sealing and curing, and hence a serious problem is that mass production is impossible.
A method for solving the problems involved by an increase in diameter of the substrate having the semiconductor devices mounted thereon or the wafer having the semiconductor devices formed thereon as described above is to fill a sealing resin composition with nearly 90 wt % of a filler or reduce the contraction stress at the time of curing based on realization of low elasticity of the sealing resin composition (Japanese Unexamined Patent Application Publication No. 2002-179885, Japanese Unexamined Patent Application Publication No. 2009-60146, and Japanese Unexamined Patent Application Publication No. 2007-001266).
However, there newly arises a problem that, when filling with nearly 90 wt % of the filler, viscosity of the sealing resin composition increases, and force is applied the semiconductor devices mounted on the substrate at the time of casting, molding and sealing of the sealing resin composition, whereby the semiconductor devices is delaminated from the substrate. Moreover, when the elasticity of the sealing resin is lowered, the warp of the sealed substrate having the semiconductor devices mounted thereon or the sealed wafer having the semiconductor devices formed thereon can be improved, but a reduction in sealing performance, e.g., heat resistance or moisture resistance newly occurs. Therefore, these solving methods cannot obtain fundamental solutions. Therefore, there has been demanded a sealing material which can collectively seal a semiconductor devices mounting surface of a substrate having the semiconductor devices mounted thereon or a semiconductor devices forming surface of a wafer having semiconductor devices formed thereon on a wafer level without occurrence of warp of the substrate or the wafer or delamination of the semiconductor devices from the substrate made of, e.g., a metal even though the large-diameter wafer or large-diameter substrate made of a metal and the like is sealed and which has excellent sealing performance, e.g., heat resistance or moisture resistance after the sealing.